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| 9 1 " 1 3 1 p x f s . 0 4 ' & 5 u n-channel power mos fet applications dmos structure ? notebook pcs low on-state resistance : 0.05 ? (max) ? cellular and portable phones ultra high-speed switching ? on - board power supplies sot-89 package ? li - ion battery systems gate protect diode built-in general description features the XP161A1355PR is a n-channel power mos fet with low on-state low on-state resistance : rds (on) = 0.05 ? ( vgs = 4.5v ) resistance and ultra high-speed switching characteristics. rds (on) = 0.07 ? ( vgs = 2.5v ) because high-speed switching is possible, the ic can be efficiently rds (on) = 0.15 ? ( vgs = 1.5v ) set thereby saving energy. ultra high-speed switching in order to counter static, a gate protect diode is built-in. gate protect diode built-in the small sot-89 package makes high density mounting possible. operational voltage : 1.5v high density mounting : sot - 89 pin configuration pin assignment pin number pin name g gate d drain s source equivalent circuit absolute maximum ratings ta=25 o c symbol ratings units vdss 20 v vgss ? 8 v id 4 a idp 16 a idr 4 a pd 2 w tch 150 o c tstg - 55 to 150 o c n - channel mos fet ( 1 device built-in ) ( note ) : when implemented on a ceramic pcb storage temperature reverse drain current continuous channel power dissipation (note) channel temperature drain - source voltage gate - source voltage drain current (dc) drain current (pulse) function 2 parameter 3 1 sot - 89 top view 23 gd 1 s 123
u electrical characteristics dc characteristics ta=25 c parameter symbol conditions min typ max units drain cut-off current idss vds = 20 , vgs = 0v 10 a gate-source leakage current igss vgs = 8 , vds = 0v 10 a gate-source cut-off voltage vgs (off ) id = 1ma , vds = 10v 0.51.2 v drain-source on-state resistance rds ( on ) id = 2a , vgs = 4.5v 0.37 0.05 ? id = 2a , vgs = 2.5v 0.050.07 ? ( note ) id = 0.5a , vgs = 1.5v 0.1 0.15 ? forward transfer admittance ( note ) body drain diode forward voltage ( note ) : effective during pulse test. dynamic characteristics ta=25 c parameter symbol conditions min typ max units input capacitance ciss 390 pf output capacitance coss vds = 10v , vgs = 0v 210 pf feedback capacitance crss f = 1 mhz 90 pf switching characteristics ta=25 c parameter symbol conditions min typ max units turn-on delay time td ( on ) 10 ns rise time tr vgs = 5v , id = 2a 15 ns turn-off delay time td ( off ) vdd = 10v 85 ns fall time tf 45 ns thermal characteristics parameter symbol conditions min typ max units thermal resistance implement on a glass epoxy ( channel - surroundings ) resin pcb id = 2a , vds = 10v | yfs | s 10 c / w 62.5 rth ( ch - a ) vf if = 4a , vgs = 0v v 0.851.1 9 1 " 1 3 1 p x f s . 0 4 ' & 5 u ? ? 5 b ? 1 v m t f 5 f t u * e " " 7 h t 7 5 b ? 1 v m t f 5 f t u 7 h t 7 7 7 7 7 7 7 7 7 XP161A1355PR electrical characteristics % s b j o 4 p v s d f 7 p m u b h f 7 e t 7 ( b u f 4 p v s d f 7 p m u b h f 7 h t 7 7 e t 7 1 v m t f 5 f t u 5 b ? drain/source on-state resistance vs. gate/source voltage drain/source on-state resistance vs. drain current 5 b ? 1 v m t f 5 f t u 7 7 ( b u f 4 p v s d f 7 p m u b h f 7 h t 7 % s b j o $ v s s f o u * e " % s b j o 4 p v s d f 0 o 4 u b u f 3 f t j t u b o d f 3 e t p o % s b j o 4 p v s d f 0 o 4 u b u f 3 f t j t u b o d f 3 e t p o drain current vs. drain/source voltage drain current vs. gate/source voltage % s b j o $ v s s f o u * e " % s b j o $ v s s f o u * e " 1 v m t f 5 f t u " n c j f o u 5 f n q f s b u v s f 5 p q s ? 7 h t 7 7 * e " " 7 7 e t 7 * e n " drain/source on-state resistance vs. ambient temp. gate/source cut off voltage variance vs. ambient temp. " n c j f o u 5 f n q f s b u v s f 5 p q s ? % s b j o 4 p v s d f 0 o 4 u b u f 3 f t j t u b o d f 3 e t p o ( b u f 4 p v s d f $ v u 0 g g 7 p m u b h f 7 b s j b o d f 7 h t p g g 7 b s j b o d f 7 " " " " u $ p t t $ j t t $ s t t u s u e p o u e p g g u g XP161A1355PR electrical characteristics % s b j o 4 p v s d f 7 p m u b h f 7 e t 7 % s b j o $ v s s f o u * e " capacitance vs. drain/source voltage switching time vs. drain current 7 h t 7 7 e e 7 1 8 t e v u z? 5 b ? 7 h t 7 g . ) [ 5 b ? 4 x j u d i j o h 5 j n f u o t $ b q b d j u b o d f $ q ' 7 standardized transition thermal resistance vs. pulse width 1 v m t f 8 j e u i 1 8 t 4 u b o e b s e j [ f e 5 s b o t j u j p o 5 i f s n b m 3 f t j t u b o d f t u 4 j o h m f 1 v m t f ( b u f $ i b s h f 2 h o d 4 p v s d f % s b j o 7 p m u b h f 7 t e 7 3 u i d i b ? 8 * n q m f n f o u f e p o b d f s b n j d 1 $ # 5 b ? 1 v m t f 5 f t u 7 e t 7 * e " 5 b ? reverse drain current vs. source/drain voltage 7 h t 7 7 7 7 gate/source voltage vs. gate charge ( b u f 4 p v s d f 7 p m u b h f 7 h t 7 3 f w f s t f % s b j o $ v s s f o u * e s " |
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